102 lines
6.1 KiB
NASM
102 lines
6.1 KiB
NASM
;-------------------------------------------------------------------------------
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; MSP430 Assembler Code Template for use with TI Code Composer Studio
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;******************************************************************************
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; MSP430G2553 Demo - USI-UART, 9600 Echo ISR, ~1 MHz SMCLK
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;
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; Description: Echo a received character, RX ISR used.
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; USI_RX interrupt triggers TX Echo.
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; Default SMCLK = DCOCLK ~= 1.05 MHz
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; Baud rate divider with SMCLK @9600 = 1MHz/2400 = 104.15
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; Original functionality by M. Buccini / G. Morton
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; Texas Instruments Inc., May 2005
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; Built with Code Composer Essentials Version: 1.0
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; Adapted for DB365 by Dorin Patru 05/14/08; updated May 2011
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; Upgraded for LaunchPad and CCS 5.4 by Dorin Patru December 2013
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;******************************************************************************
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.cdecls C,LIST,"msp430g2553.h" ; Include device header file
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;-------------------------------------------------------------------------------
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.text ; Assemble into program memory
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.retain ; Override ELF conditional linking
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; and retain current section
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.retainrefs ; Additionally retain any sections
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; that have references to current
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; section
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;-------------------------------------------------------------------------------
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RESET mov.w #__STACK_END,SP ; Initialize stackpointer
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StopWDT mov.w #WDTPW|WDTHOLD,&WDTCTL ; Stop watchdog timer
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;-------------------------------------------------------------------------------
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; Setup P1.2 as TXD and P1.1 as RXD; see data sheet port schematic and UG
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;-------------------------------------------------------------------------------
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SetupP1 bis.b #6h,&P1SEL ; P1.2/P1.1 = USART0 TXD/RXD
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bis.b #6h,&P1SEL2 ; P1.2/P1.1 = USART0 TXD/RXD
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;-------------------------------------------------------------------------------
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; Setup USI in UART mode, minimal configuration, point to point
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;-------------------------------------------------------------------------------
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SetupUART0 clr.b &UCA0CTL0 ; default values - see UG
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clr.b &UCA0CTL1 ; default values - see UG
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bis.b #UCSSEL1 + UCSSEL0,&UCA0CTL1 ; UCLK = SMCLK ~1 MHz
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clr.b &UCA0STAT ; default values - see UG
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bis.b #UCLISTEN,&UCA0STAT ; loopback - used for debugging only
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;-------------------------------------------------------------------------------
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; For a baud rate of 9600,the pre-scaler value is
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; = (UCAxBR0 + UCAxBR1 <20> 256) = 104 in decimal - integer part - see UG
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;-------------------------------------------------------------------------------
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mov.b #050h,&UCA0BR0 ; Baud Rate = ? - YOU MUST COME UP WITH THIS VALUE
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mov.b #000h,&UCA0BR1 ; UCBRx = ? - FOR THE REQUIRED BAUD RATE
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;-------------------------------------------------------------------------------
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; Modulation Control Register - fractional part - see UG
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;-------------------------------------------------------------------------------
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mov.b #002h,&UCA0MCTL ; UCBRFx = 0, UCBRSx = 1, UCOS16 = 0
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;-------------------------------------------------------------------------------
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; SW reset of the USI state machine
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;-------------------------------------------------------------------------------
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bic.b #UCSWRST,&UCA0CTL1 ; **Initialize USI state machine**
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bis.b #UCA0RXIE,&IE2 ; Enable USART0 RX interrupt
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bis.b #GIE,SR ; General Interrupts Enabled
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;-------------------------------------------------------------------------------
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; After the state machine is reset, the TXD line seems to oscillate a few times
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; It is therefore safer to check if the machine is in a state in which it is
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; ready to transmit the next byte. I learned it the hard way ;-(
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;-------------------------------------------------------------------------------
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TX2 bit.b #UCA0TXIFG,&IFG2 ; USI TX buffer ready?
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jz TX2 ; Jump if TX buffer not ready
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mov.b #0x55,&UCA0TXBUF ; TX <U> charac. eq. to #0x55 in ASCII
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;-------------------------------------------------------------------------------
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; Mainloop starts here:
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;------------------------------------------------------------------------------- ;
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Mainloop nop ;
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nop ; Required for debugger
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jmp Mainloop ;
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;------------------------------------------------------------------------------
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; Echo back RXed character, confirm TX buffer is ready first
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;------------------------------------------------------------------------------
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USART0RX_ISR: nop ;
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TX1 bit.b #UCA0TXIFG,&IFG2 ; USI TX buffer ready?
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jz TX1 ; Jump if TX buffer not ready
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;-------------------------------------------------------------------------------
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; The order of execution of the two instruction sequence above and the one
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; below could be switched.
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;-------------------------------------------------------------------------------
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mov.b &UCA0RXBUF,r10 ; Move received byte in r10
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;-------------------------------------------------------------------------------
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; For demonstration purposes, it is assumed that the remote terminal sends
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; numbers which are eual to the upper case letter. By adding the value 0x20 to
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; it, the echoed number represents the same, but lower case letter.
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;-------------------------------------------------------------------------------
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add.b #0x20, r10 ; add 0x20 to change upper -> lower case
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mov.b r10,&UCA0TXBUF ; TX -> RXed character
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reti ;
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;-------------------------------------------------------------------------------
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; Stack Pointer definition
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;-------------------------------------------------------------------------------
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.global __STACK_END
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.sect .stack
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;-------------------------------------------------------------------------------
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; Interrupt Vectors - see device specific header file
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;-------------------------------------------------------------------------------
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.sect ".reset" ; RESET Vector
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.short RESET
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.sect ".int07" ; USI - RXD Vector
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isr_USART: .short USART0RX_ISR ; USI receive ISR
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.end
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