Initial Release

flash/CMakeLists.txt

@@ -0,0 +1,7 @@
+if (NOT PICO_NO_HARDWARE)
+    add_subdirectory(cache_perfctr)
+    add_subdirectory(nuke)
+    add_subdirectory(program)
+    add_subdirectory(ssi_dma)
+    add_subdirectory(xip_stream)
+endif ()

flash/cache_perfctr/CMakeLists.txt

@@ -0,0 +1,13 @@
+add_executable(flash_cache_perfctr
+        flash_cache_perfctr.c
+        )
+
+target_link_libraries(flash_cache_perfctr
+        pico_stdlib
+        )
+
+# create map/bin/hex file etc.
+pico_add_extra_outputs(flash_cache_perfctr)
+
+# add url via pico_set_program_url
+example_auto_set_url(flash_cache_perfctr)

flash/cache_perfctr/flash_cache_perfctr.c

@@ -0,0 +1,88 @@
+/**
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "pico/stdlib.h"
+#include "hardware/structs/xip_ctrl.h"
+
+// Example of using cache hit/access counters, and showing the effect of
+// invalidate on cache miss/hit.
+
+
+const uint32_t test_data[8] = {0, 1, 2, 3, 4, 5, 6, 7};
+
+void __no_inline_not_in_flash_func(check)(bool cond, const char *msg) {
+    if (!cond) {
+        puts(msg);
+        exit(-1);
+    }
+}
+
+void __no_inline_not_in_flash_func(check_hit_miss_invalidate)() {
+    io_rw_32 *test_data_ptr = (io_rw_32 *) test_data;
+
+    //tag::check_hit_miss_invalidate[]
+    // Flush cache to make sure we miss the first time we access test_data
+    xip_ctrl_hw->flush = 1;
+    while (!(xip_ctrl_hw->stat & XIP_STAT_FLUSH_READY_BITS))
+        tight_loop_contents();
+
+    // Clear counters (write any value to clear)
+    xip_ctrl_hw->ctr_acc = 1;
+    xip_ctrl_hw->ctr_hit = 1;
+
+    (void) *test_data_ptr;
+    check(xip_ctrl_hw->ctr_hit == 0 && xip_ctrl_hw->ctr_acc == 1,
+          "First access to data should miss");
+
+    (void) *test_data_ptr;
+    check(xip_ctrl_hw->ctr_hit == 1 && xip_ctrl_hw->ctr_acc == 2,
+          "Second access to data should hit");
+
+    // Write to invalidate individual cache lines (64 bits)
+    // Writes must be directed to the cacheable, allocatable alias (address 0x10.._....)
+    *test_data_ptr = 0;
+    (void) *test_data_ptr;
+    check(xip_ctrl_hw->ctr_hit == 1 && xip_ctrl_hw->ctr_acc == 3,
+          "Should miss after invalidation");
+    (void) *test_data_ptr;
+    check(xip_ctrl_hw->ctr_hit == 2 && xip_ctrl_hw->ctr_acc == 4,
+          "Second access after invalidation should hit again");
+    //end::check_hit_miss_invalidate[]
+}
+
+// Some code which achieves a very high cache hit rate:
+int recursive_fibonacci(int n) {
+    if (n <= 1)
+        return 1;
+    else
+        return recursive_fibonacci(n - 1) + recursive_fibonacci(n - 2);
+}
+
+int main() {
+    stdio_init_all();
+
+    uint hit = xip_ctrl_hw->ctr_hit;
+    uint access = xip_ctrl_hw->ctr_acc;
+
+    if (access == 0)
+        printf("It looks like you're running this example from SRAM. This probably won't go well!\n");
+
+    // Note the hit rate will appear quite low at boot, as the .data,
+    // .time_critical init in crt0 read a lot of read-once data from flash
+    printf("At boot: %d hits, %d accesses\n", hit, access);
+    printf("Hit rate so far: %.1f%%\n", hit * 100.f / access);
+
+    printf("Calculate 25th fibonacci number: %d\n", recursive_fibonacci(25));
+    printf("New hit rate after printf and fibonacci: %.1f%%\n", xip_ctrl_hw->ctr_hit * 100.f / xip_ctrl_hw->ctr_acc);
+
+    check_hit_miss_invalidate();
+
+    printf("Hit/miss check passed\n");
+    return 0;
+}

flash/nuke/CMakeLists.txt

@@ -0,0 +1,18 @@
+add_executable(flash_nuke
+        nuke.c
+        )
+
+target_link_libraries(flash_nuke
+        pico_stdlib
+        hardware_flash
+        )
+
+# It doesn't make sense to run this program from flash. Always build a
+# RAM-only binary.
+pico_set_binary_type(flash_nuke no_flash)
+
+pico_add_extra_outputs(flash_nuke)
+
+# add url via pico_set_program_url
+example_auto_set_url(flash_nuke)
+

flash/nuke/nuke.c

@@ -0,0 +1,47 @@
+/**
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+// Obliterate the contents of flash. This is a silly thing to do if you are
+// trying to run this program from flash, so you should really load and run
+// directly from SRAM. You can enable RAM-only builds for all targets by doing:
+//
+// cmake -DPICO_NO_FLASH=1 ..
+//
+// in your build directory. We've also forced no-flash builds for this app in
+// particular by adding:
+//
+// pico_set_binary_type(flash_nuke no_flash)
+//
+// To the CMakeLists.txt app for this file. Just to be sure, we can check the
+// define:
+#if !PICO_NO_FLASH
+#error "This example must be built to run from SRAM!"
+#endif
+
+#include "pico/stdlib.h"
+#include "hardware/flash.h"
+#include "pico/bootrom.h"
+
+int main() {
+    flash_range_erase(0, PICO_FLASH_SIZE_BYTES);
+    // Leave an eyecatcher pattern in the first page of flash so picotool can
+    // more easily check the size:
+    static const uint8_t eyecatcher[FLASH_PAGE_SIZE] = "NUKE";
+    flash_range_program(0, eyecatcher, FLASH_PAGE_SIZE);
+
+    // Flash LED for success
+    gpio_init(PICO_DEFAULT_LED_PIN);
+    gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
+    for (int i = 0; i < 3; ++i) {
+        gpio_put(PICO_DEFAULT_LED_PIN, 1);
+        sleep_ms(100);
+        gpio_put(PICO_DEFAULT_LED_PIN, 0);
+        sleep_ms(100);
+    }
+
+    // Pop back up as an MSD drive
+    reset_usb_boot(0, 0);
+}

flash/program/CMakeLists.txt

@@ -0,0 +1,14 @@
+add_executable(flash_program
+        flash_program.c
+        )
+
+target_link_libraries(flash_program
+        pico_stdlib
+        hardware_flash
+        )
+
+# create map/bin/hex file etc.
+pico_add_extra_outputs(flash_program)
+
+# add url via pico_set_program_url
+example_auto_set_url(flash_program)

flash/program/flash_program.c

@@ -0,0 +1,58 @@
+/**
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "pico/stdlib.h"
+#include "hardware/flash.h"
+
+// We're going to erase and reprogram a region 256k from the start of flash.
+// Once done, we can access this at XIP_BASE + 256k.
+#define FLASH_TARGET_OFFSET (256 * 1024)
+
+const uint8_t *flash_target_contents = (const uint8_t *) (XIP_BASE + FLASH_TARGET_OFFSET);
+
+void print_buf(const uint8_t *buf, size_t len) {
+    for (size_t i = 0; i < len; ++i) {
+        printf("%02x", buf[i]);
+        if (i % 16 == 15)
+            printf("\n");
+        else
+            printf(" ");
+    }
+}
+
+int main() {
+    stdio_init_all();
+    uint8_t random_data[FLASH_PAGE_SIZE];
+    for (int i = 0; i < FLASH_PAGE_SIZE; ++i)
+        random_data[i] = rand() >> 16;
+
+    printf("Generated random data:\n");
+    print_buf(random_data, FLASH_PAGE_SIZE);
+
+    // Note that a whole number of sectors must be erased at a time.
+    printf("\nErasing target region...\n");
+    flash_range_erase(FLASH_TARGET_OFFSET, FLASH_SECTOR_SIZE);
+    printf("Done. Read back target region:\n");
+    print_buf(flash_target_contents, FLASH_PAGE_SIZE);
+
+    printf("\nProgramming target region...\n");
+    flash_range_program(FLASH_TARGET_OFFSET, random_data, FLASH_PAGE_SIZE);
+    printf("Done. Read back target region:\n");
+    print_buf(flash_target_contents, FLASH_PAGE_SIZE);
+
+    bool mismatch = false;
+    for (int i = 0; i < FLASH_PAGE_SIZE; ++i) {
+        if (random_data[i] != flash_target_contents[i])
+            mismatch = true;
+    }
+    if (mismatch)
+        printf("Programming failed!\n");
+    else
+        printf("Programming successful!\n");
+}

flash/ssi_dma/CMakeLists.txt

@@ -0,0 +1,14 @@
+add_executable(flash_ssi_dma
+        flash_ssi_dma.c
+        )
+
+target_link_libraries(flash_ssi_dma
+        pico_stdlib
+        hardware_dma
+        )
+
+# create map/bin/hex file etc.
+pico_add_extra_outputs(flash_ssi_dma)
+
+# add url via pico_set_program_url
+example_auto_set_url(flash_ssi_dma)

flash/ssi_dma/flash_ssi_dma.c

@@ -0,0 +1,90 @@
+/**
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdio.h>
+#include <string.h>
+
+#include "pico/stdlib.h"
+#include "pico/time.h"
+#include "hardware/dma.h"
+#include "hardware/structs/ssi.h"
+
+// This example DMAs 16kB of data from the start of flash to SRAM, and
+// measures the transfer speed.
+//
+// The SSI (flash interface) inside the XIP block has DREQ logic, so we can
+// DMA directly from its FIFOs. Unlike the XIP stream hardware (see
+// flash_xip_stream.c) this can *not* be done whilst code is running from
+// flash, without careful footwork like we do here. The tradeoff is that it's
+// ~2.5x as fast in QSPI mode, ~2x as fast in SPI mode.
+
+void __no_inline_not_in_flash_func(flash_bulk_read)(uint32_t *rxbuf, uint32_t flash_offs, size_t len,
+                                                 uint dma_chan) {
+    // SSI must be disabled to set transfer size. If software is executing
+    // from flash right now then it's about to have a bad time
+    ssi_hw->ssienr = 0;
+    ssi_hw->ctrlr1 = len - 1; // NDF, number of data frames
+    ssi_hw->dmacr = SSI_DMACR_TDMAE_BITS | SSI_DMACR_RDMAE_BITS;
+    ssi_hw->ssienr = 1;
+    // Other than NDF, the SSI configuration used for XIP is suitable for a bulk read too.
+
+    // Configure and start the DMA. Note we are avoiding the dma_*() functions
+    // as we can't guarantee they'll be inlined
+    dma_hw->ch[dma_chan].read_addr = (uint32_t) &ssi_hw->dr0;
+    dma_hw->ch[dma_chan].write_addr = (uint32_t) rxbuf;
+    dma_hw->ch[dma_chan].transfer_count = len;
+    // Must enable DMA byteswap because non-XIP 32-bit flash transfers are
+    // big-endian on SSI (we added a hardware tweak to make XIP sensible)
+    dma_hw->ch[dma_chan].ctrl_trig =
+            DMA_CH0_CTRL_TRIG_BSWAP_BITS |
+            DREQ_XIP_SSIRX << DMA_CH0_CTRL_TRIG_TREQ_SEL_LSB |
+            dma_chan << DMA_CH0_CTRL_TRIG_CHAIN_TO_LSB |
+            DMA_CH0_CTRL_TRIG_INCR_WRITE_BITS |
+            DMA_CH0_CTRL_TRIG_DATA_SIZE_VALUE_SIZE_WORD << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB |
+            DMA_CH0_CTRL_TRIG_EN_BITS;
+
+    // Now DMA is waiting, kick off the SSI transfer (mode continuation bits in LSBs)
+    ssi_hw->dr0 = (flash_offs << 8u) | 0xa0u;
+
+    // Wait for DMA finish
+    while (dma_hw->ch[dma_chan].ctrl_trig & DMA_CH0_CTRL_TRIG_BUSY_BITS);
+
+    // Reconfigure SSI before we jump back into flash!
+    ssi_hw->ssienr = 0;
+    ssi_hw->ctrlr1 = 0; // Single 32-bit data frame per transfer
+    ssi_hw->dmacr = 0;
+    ssi_hw->ssienr = 1;
+}
+
+#define DATA_SIZE_WORDS 4096
+
+uint32_t rxdata[DATA_SIZE_WORDS];
+uint32_t *expect = (uint32_t *) XIP_NOCACHE_NOALLOC_BASE;
+
+int main() {
+    stdio_init_all();
+    memset(rxdata, 0, DATA_SIZE_WORDS * sizeof(uint32_t));
+
+    printf("Starting DMA\n");
+    uint32_t start_time = time_us_32();
+    flash_bulk_read(rxdata, 0, DATA_SIZE_WORDS, 0);
+    uint32_t finish_time = time_us_32();
+    printf("DMA finished\n");
+
+    float elapsed_time_s = 1e-6f * (finish_time - start_time);
+    printf("Transfer speed: %.3f MB/s\n", (sizeof(uint32_t) * DATA_SIZE_WORDS / 1e6f) / elapsed_time_s);
+
+    bool mismatch = false;
+    for (int i = 0; i < DATA_SIZE_WORDS; ++i) {
+        if (rxdata[i] != expect[i]) {
+            printf("Mismatch at %d: expected %08x, got %08x\n", i, expect[i], rxdata[i]);
+            mismatch = true;
+            break;
+        }
+    }
+    if (!mismatch)
+        printf("Data check ok\n");
+}

flash/xip_stream/CMakeLists.txt

@@ -0,0 +1,14 @@
+add_executable(flash_xip_stream
+        flash_xip_stream.c
+        )
+
+target_link_libraries(flash_xip_stream
+        pico_stdlib
+        hardware_dma
+        )
+
+# create map/bin/hex file etc.
+pico_add_extra_outputs(flash_xip_stream)
+
+# add url via pico_set_program_url
+example_auto_set_url(flash_xip_stream)

flash/xip_stream/flash_xip_stream.c

@@ -0,0 +1,88 @@
+/**
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "pico/stdlib.h"
+#include "hardware/dma.h"
+#include "hardware/regs/addressmap.h"
+#include "hardware/structs/xip_ctrl.h"
+
+#include "random_test_data.h"
+
+// The XIP has some internal hardware that can stream a linear access sequence
+// to a DMAable FIFO, while the system is still doing random accesses on flash
+// code + data.
+
+uint32_t buf[count_of(random_test_data)];
+
+int main() {
+    stdio_init_all();
+    for (int i = 0; i < count_of(random_test_data); ++i)
+        buf[i] = 0;
+
+    // This example won't work with PICO_NO_FLASH builds. Note that XIP stream
+    // can be made to work in these cases, if you enable some XIP mode first
+    // (e.g. via calling flash_enter_cmd_xip() in ROM). However, you will get
+    // much better performance by DMAing directly from the SSI's FIFOs, as in
+    // this way you can clock data continuously on the QSPI bus, rather than a
+    // series of short transfers.
+    if ((uint32_t) &random_test_data[0] >= SRAM_BASE) {
+        printf("You need to run this example from flash!\n");
+        exit(-1);
+    }
+
+    // Transfer started by writing nonzero value to stream_ctr. stream_ctr
+    // will count down as the transfer progresses. Can terminate early by
+    // writing 0 to stream_ctr.
+    // It's a good idea to drain the FIFO first!
+    printf("Starting stream from %p\n", random_test_data);
+    //tag::start_stream[]
+    while (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
+        (void) xip_ctrl_hw->stream_fifo;
+    xip_ctrl_hw->stream_addr = (uint32_t) &random_test_data[0];
+    xip_ctrl_hw->stream_ctr = count_of(random_test_data);
+    //end::start_stream[]
+
+    // Start DMA transfer from XIP stream FIFO to our buffer in memory. Use
+    // the auxiliary bus slave for the DMA<-FIFO accesses, to avoid stalling
+    // the DMA against general XIP traffic. Doesn't really matter for this
+    // example, but it can have a huge effect on DMA throughput.
+
+    printf("Starting DMA\n");
+    //tag::start_dma[]
+    const uint dma_chan = 0;
+    dma_channel_config cfg = dma_channel_get_default_config(dma_chan);
+    channel_config_set_read_increment(&cfg, false);
+    channel_config_set_write_increment(&cfg, true);
+    channel_config_set_dreq(&cfg, DREQ_XIP_STREAM);
+    dma_channel_configure(
+            dma_chan,
+            &cfg,
+            (void *) buf,                 // Write addr
+            (const void *) XIP_AUX_BASE,  // Read addr
+            count_of(random_test_data), // Transfer count
+            true                        // Start immediately!
+    );
+    //end::start_dma[]
+
+    dma_channel_wait_for_finish_blocking(dma_chan);
+
+    printf("DMA complete\n");
+
+    bool mismatch = false;
+    for (int i = 0; i < count_of(random_test_data); ++i) {
+        if (random_test_data[i] != buf[i]) {
+            printf("Data mismatch: %08x (actual) != %08x (expected)\n", buf[i], random_test_data[i]);
+            mismatch = true;
+            break;
+        }
+        printf("%08x%c", buf[i], i % 8 == 7 ? '\n' : ' ');
+    }
+    if (!mismatch)
+        printf("Data check OK\n");
+}

flash/xip_stream/random_test_data.h

@@ -0,0 +1,160 @@
+const uint32_t random_test_data[] = {
+        0x76654e22, 0x47207265, 0x616e6e6f,
+        0x76694720, 0x6f592065, 0x70552075,
+        0x570a0a22, 0x65722765, 0x206f6e20,
+        0x61727473, 0x7265676e, 0x6f742073,
+        0x766f6c20, 0x6f590a65, 0x6e6b2075,
+        0x7420776f, 0x72206568, 0x73656c75,
+        0x646e6120, 0x206f7320, 0x49206f64,
+        0x6620410a, 0x206c6c75, 0x6d6d6f63,
+        0x656d7469, 0x7327746e, 0x61687720,
+        0x27492074, 0x6874206d, 0x696b6e69,
+        0x6f20676e, 0x6f590a66, 0x6f772075,
+        0x6e646c75, 0x67207427, 0x74207465,
+        0x20736968, 0x6d6f7266, 0x796e6120,
+        0x68746f20, 0x67207265, 0x0a0a7975,
+        0x756a2049, 0x77207473, 0x616e6e61,
+        0x6c657420, 0x6f79206c, 0x6f682075,
+        0x27492077, 0x6566206d, 0x6e696c65,
+        0x6f470a67, 0x20617474, 0x656b616d,
+        0x756f7920, 0x646e7520, 0x74737265,
+        0x0a646e61, 0x76654e0a, 0x67207265,
+        0x616e6e6f, 0x76696720, 0x6f792065,
+        0x70752075, 0x76654e0a, 0x67207265,
+        0x616e6e6f, 0x74656c20, 0x756f7920,
+        0x776f6420, 0x654e0a6e, 0x20726576,
+        0x6e6e6f67, 0x75722061, 0x7261206e,
+        0x646e756f, 0x646e6120, 0x73656420,
+        0x20747265, 0x0a756f79, 0x6576654e,
+        0x6f672072, 0x20616e6e, 0x656b616d,
+        0x756f7920, 0x79726320, 0x76654e0a,
+        0x67207265, 0x616e6e6f, 0x79617320,
+        0x6f6f6720, 0x65796264, 0x76654e0a,
+        0x67207265, 0x616e6e6f, 0x6c657420,
+        0x2061206c, 0x2065696c, 0x20646e61,
+        0x74727568, 0x756f7920, 0x65570a0a,
+        0x20657627, 0x776f6e6b, 0x6165206e,
+        0x6f206863, 0x72656874, 0x726f6620,
+        0x206f7320, 0x676e6f6c, 0x756f590a,
+        0x65682072, 0x27747261, 0x65622073,
+        0x61206e65, 0x6e696863, 0x62202c67,
+        0x590a7475, 0x7227756f, 0x6f742065,
+        0x6873206f, 0x6f742079, 0x79617320,
+        0x0a746920, 0x69736e49, 0x202c6564,
+        0x62206577, 0x2068746f, 0x776f6e6b,
+        0x61687720, 0x20732774, 0x6e656562,
+        0x696f6720, 0x6f20676e, 0x65570a6e,
+        0x6f6e6b20, 0x68742077, 0x61672065,
+        0x6120656d, 0x7720646e, 0x65722765,
+        0x6e6f6720, 0x7020616e, 0x2079616c,
+        0x0a0a7469, 0x20646e41, 0x79206669,
+        0x6120756f, 0x6d206b73, 0x6f682065,
+        0x27492077, 0x6566206d, 0x6e696c65,
+        0x6f440a67, 0x2074276e, 0x6c6c6574,
+        0x20656d20, 0x27756f79, 0x74206572,
+        0x62206f6f, 0x646e696c, 0x206f7420,
+        0x0a656573, 0x76654e0a, 0x67207265,
+        0x616e6e6f, 0x76696720, 0x6f792065,
+        0x70752075, 0x76654e0a, 0x67207265,
+        0x616e6e6f, 0x74656c20, 0x756f7920,
+        0x776f6420, 0x654e0a6e, 0x20726576,
+        0x6e6e6f67, 0x75722061, 0x7261206e,
+        0x646e756f, 0x646e6120, 0x73656420,
+        0x20747265, 0x0a756f79, 0x6576654e,
+        0x6f672072, 0x20616e6e, 0x656b616d,
+        0x756f7920, 0x79726320, 0x76654e0a,
+        0x67207265, 0x616e6e6f, 0x79617320,
+        0x6f6f6720, 0x65796264, 0x76654e0a,
+        0x67207265, 0x616e6e6f, 0x6c657420,
+        0x2061206c, 0x2065696c, 0x20646e61,
+        0x74727568, 0x756f7920, 0x654e0a0a,
+        0x20726576, 0x6e6e6f67, 0x69672061,
+        0x79206576, 0x7520756f, 0x654e0a70,
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