Initial Release
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88
flash/cache_perfctr/flash_cache_perfctr.c
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88
flash/cache_perfctr/flash_cache_perfctr.c
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/**
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include "pico/stdlib.h"
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#include "hardware/structs/xip_ctrl.h"
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// Example of using cache hit/access counters, and showing the effect of
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// invalidate on cache miss/hit.
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const uint32_t test_data[8] = {0, 1, 2, 3, 4, 5, 6, 7};
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void __no_inline_not_in_flash_func(check)(bool cond, const char *msg) {
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if (!cond) {
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puts(msg);
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exit(-1);
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}
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}
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void __no_inline_not_in_flash_func(check_hit_miss_invalidate)() {
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io_rw_32 *test_data_ptr = (io_rw_32 *) test_data;
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//tag::check_hit_miss_invalidate[]
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// Flush cache to make sure we miss the first time we access test_data
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xip_ctrl_hw->flush = 1;
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while (!(xip_ctrl_hw->stat & XIP_STAT_FLUSH_READY_BITS))
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tight_loop_contents();
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// Clear counters (write any value to clear)
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xip_ctrl_hw->ctr_acc = 1;
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xip_ctrl_hw->ctr_hit = 1;
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(void) *test_data_ptr;
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check(xip_ctrl_hw->ctr_hit == 0 && xip_ctrl_hw->ctr_acc == 1,
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"First access to data should miss");
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(void) *test_data_ptr;
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check(xip_ctrl_hw->ctr_hit == 1 && xip_ctrl_hw->ctr_acc == 2,
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"Second access to data should hit");
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// Write to invalidate individual cache lines (64 bits)
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// Writes must be directed to the cacheable, allocatable alias (address 0x10.._....)
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*test_data_ptr = 0;
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(void) *test_data_ptr;
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check(xip_ctrl_hw->ctr_hit == 1 && xip_ctrl_hw->ctr_acc == 3,
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"Should miss after invalidation");
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(void) *test_data_ptr;
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check(xip_ctrl_hw->ctr_hit == 2 && xip_ctrl_hw->ctr_acc == 4,
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"Second access after invalidation should hit again");
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//end::check_hit_miss_invalidate[]
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}
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// Some code which achieves a very high cache hit rate:
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int recursive_fibonacci(int n) {
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if (n <= 1)
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return 1;
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else
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return recursive_fibonacci(n - 1) + recursive_fibonacci(n - 2);
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}
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int main() {
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stdio_init_all();
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uint hit = xip_ctrl_hw->ctr_hit;
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uint access = xip_ctrl_hw->ctr_acc;
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if (access == 0)
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printf("It looks like you're running this example from SRAM. This probably won't go well!\n");
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// Note the hit rate will appear quite low at boot, as the .data,
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// .time_critical init in crt0 read a lot of read-once data from flash
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printf("At boot: %d hits, %d accesses\n", hit, access);
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printf("Hit rate so far: %.1f%%\n", hit * 100.f / access);
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printf("Calculate 25th fibonacci number: %d\n", recursive_fibonacci(25));
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printf("New hit rate after printf and fibonacci: %.1f%%\n", xip_ctrl_hw->ctr_hit * 100.f / xip_ctrl_hw->ctr_acc);
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check_hit_miss_invalidate();
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printf("Hit/miss check passed\n");
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return 0;
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}
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