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61 lines
2.6 KiB
VHDL
61 lines
2.6 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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entity fizzer is
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port( i: in std_logic_vector(7 downto 0);
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o: out std_logic
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);
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end fizzer;
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--reduced with Quine-McCluskey
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--inputs outside 1-100 are don't-cares
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architecture behav of fizzer is
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signal A, B, C, D, E, F, G: std_logic;
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signal T: std_logic_vector(32 downto 0);
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begin
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A <= i(0);
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B <= i(1);
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C <= i(2);
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D <= i(3);
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E <= i(4);
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F <= i(5);
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G <= i(6);
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o <= T(0) or T(1) or T(2) or T(3) or T(4) or T(5) or T(6) or T(7) or T(8) or T(9) or T(10) or T(11) or T(12) or T(13) or T(14) or T(15) or T(16) or T(17) or T(18) or T(19) or T(20) or T(21) or T(22) or T(23) or T(24) or T(25) or T(26) or T(27) or T(28) or T(29) or T(30) or T(31) or T(32);
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T(0) <= A and B and not C and not D and not E and not F and not G;
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T(1) <= not A and B and C and not D and not E and not F and not G;
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T(2) <= A and not B and not C and D and not E and not F and not G;
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T(3) <= not A and not B and C and D and not E and not F and not G;
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T(4) <= A and B and C and D and not E and not F and not G;
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T(5) <= not A and B and not C and not D and E and not F and not G;
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T(6) <= A and not B and C and not D and E and not F and not G;
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T(7) <= not A and not B and not C and D and E and not F and not G;
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T(8) <= A and B and not C and D and E and not F and not G;
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T(9) <= not A and B and C and D and E and not F and not G;
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T(10) <= A and not B and not C and not D and not E and F and not G;
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T(11) <= not A and not B and C and not D and not E and F and not G;
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T(12) <= A and B and C and not D and not E and F;
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T(13) <= not A and B and not C and D and not E and F;
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T(14) <= A and not B and C and D and not E and F;
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T(15) <= not A and not B and not C and not D and E and F;
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T(16) <= A and B and not C and not D and E and F;
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T(17) <= not A and B and C and not D and E and F;
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T(18) <= A and not B and not C and D and E and F;
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T(19) <= not A and not B and C and D and E and F;
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T(20) <= A and B and C and D and E and F;
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T(21) <= not A and B and not C and not D and not E and not F and G;
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T(22) <= A and not B and C and not D and not E and G;
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T(23) <= not A and not B and not C and D and not E and G;
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T(24) <= A and B and not C and D and not E and G;
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T(25) <= not A and B and C and D and not E and G;
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T(26) <= A and not B and not C and not D and E and G;
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T(27) <= not A and not B and C and not D and E and G;
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T(28) <= A and B and C and not D and E and G;
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T(29) <= not A and B and not C and D and E and G;
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T(30) <= A and not B and C and D and E and G;
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T(31) <= not A and not B and not C and F and G;
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T(32) <= A and B and F and G;
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end behav;
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